- 利用MATLAB设计FIR滤波器，生成代码verilog HDL代码
利用MATLAB设计FIR滤波器，并生成HDL代码用于设计。自己设计Testbench文件对滤波器代码进行仿真验证。
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利用MATLAB设计FIR滤波器，生成代码verilog HDL代码
Section 1 : 目的
- 基于MATLAB平台设计FIR(Finite Impulse Response, FIR)滤波器
- 对设计的滤波器进行定点量化
- 生成verilog HDL代码
- 利用Modelsim进行仿真
Section 2 : 理论回顾
- Fir滤波器
这部分知识是我搬运了杜勇老师的书籍《数字滤波器的 MATLAB与FPGA实现 Altera/Verilog版》。虽然之前自己也做过好几次的FIR滤波器的demo，但是对他的了解总是记了又忘。杜勇老师的理论部分，我再重新总结提取一下：
1）线性时不变系统（LTI）：我们设计一个数字滤波器，本质上是设计一个线性时不变系统。待滤波的信号输入至一个线性时不变系统，然后输出一个滤波后的数据。这个系统符合叠加原理与时不变原理。我理解成，信号x1(n)输入至线性时不变系统，输出为y1(n)。信号x2(n)输入至线性时不变系统，输出为y2(n)。如果同时输入信号x1(n)与x2(n)，那么线性时不变系统输出即为y1(n)+y2(n)。用通俗的话讲，我星期一跑了100m，我运动卡路里消耗100千卡。星期二我做了20个俯卧撑，消耗了20千卡。星期三我跑了100m后又做了20个俯卧撑，那么我星期三我消耗了120千卡（这个是叠加性）。如果我本来星期四要跑100m，但是有事我延迟到了星期五再去跑，那么我运动消耗也延迟到了星期五（这个是时不变性，也就是输出是会跟踪输入的变化）。
2）对数字信号处理而言，所有处理的信号都是离散的序列。如果说原本的信号是x(t), 式中 t 是连续的时间。在数字信号处理中，处理的信号是x(n), 式中 n 是离散的时间点。点与点之间的时间间隔是采样频率的倒数。比如一个ADC的采样频率位1.25MHz , 那么相邻的采样点之间的时间间隔是800 ns 。
3）一个离散的序列x(n)可以分解成一系列单位冲激信号δ(n)累加而成：
4）对于一个LTI系统，当上述的离散序列x(n)输入时，其输出表示如下：
上式中 h(n-k) 为 δ(n-k) 的系统响应，及系统的单位冲激响应。那么根据LTI系统的叠加性，那么对于序列x(n)的输入，此时系统的输出是一系列单位冲激响应的累加。而x(k)可以认为是单位冲激信号的增益系数，因此最终的输出就是x(k)乘上对应的δ(n-k)的响应h(n-k)。
5）所谓FIR滤波器，即有限冲激响应滤波器，也就是说系统的单位冲激响应h(n-k) 的数量是有限的。系统的单位冲激响应只在有限时间段内不为0，其他时间段内为0.
上面部分仅仅是一些最浅显的部分，更多也可以参考江志红主编的《深入浅出数字信号处理》
MATLAB设计流程
参考文章链接：
本文设计目标与滤波器参数选择
- 采样率选择：本文根据实际设计需求，选择采样率为1.25MHz.这个根据ADC与系统处理能力进行综合选择。
- 本文根据实际PGC（Phase-Generated-Carrier）解调算法需要,载波为48kHz，因此要设计的低通滤波器（LPF）通带为载波的一半。本设计中截止频率取为20kHz.
- MATLAB中的filter designer设计工具，界面如下：
- 进入设计界面后，首先进行滤波器参数设计，本文选取参数如下界面。本文选取低通滤波器，设计方法选择FIR中的等波纹，当然也可以选择其他的方法，如窗函数法等。滤波器阶数选择最小阶，这个是设置完所有参数后，点击设计滤波器按钮后自动生成的阶数，比如下面参数他自动生成的阶数为275阶。频率设定，Fs为采样频率设置为1250kHz，即1.25MHz.通带截止频率(Fpass)设置为20kHz，阻带截止频率(Fstop)设置为30kHz。幅值设定，通带纹波Apass设置为0.5dB。这个参数就是通带内增益会有波动，0.5dB就是上下抖动不超过+/-0.5dB,局部放大如下图（通带纹波）。阻带幅值设置为-60dB，所以阻带幅值可以看出被压在了-60dB，换算出幅值，也就是缩小了1000倍。最后点击设计滤波器会自动生成阶数。
- FPGA定点数量化参数设计。FPGA设计需要进行参数量化，如果没有ARM核的纯FPGA就是定点数运算，因此需要把FIR滤波器的单位冲激响应参数进行定点数量化，如下图。滤波器单位冲激响应参数量化为16位定点数。由于我们这里不是输出参数给IP核，因此不需要设计小数，直接点击最佳精度小数长度。本文输入设计为32位，这个根据实际需要滤波的序列位数来设计。设计完后点击应用，它会自动计算出输出位长。
- Verilog HDL代码输出。点击目标->生成HDL
输出语言选择verilog，滤波器代码与输出文件夹自己选择。最重要选择滤波器结构，有很多种，全串行，半串行，全并行等。这里选择半串行，这里是兼具考虑资源与运行速度两种考量选择的结果。具体选择依据参考杜勇老师的滤波器设计书籍有很详细的介绍。
- 生成后进行Modelsim仿真
Testbench 代码
`timescale 1ns/1ps
/* PGC算法仿真测试文件 */
module Tb_Data();
localparam LEN = 500000 ;
reg [15:0] adc_mea[LEN-1:0] ;
reg [15:0] adc_car[LEN-1:0] ;
reg clk ;
reg clk_200M ;
reg rst ;
reg [17:0] cnt ;
reg signed [15:0] sim_mea ;
reg [15:0] sim_car ;
reg data_come,data_come1 ;
reg data_valid;
wire sys_clk;
wire sample_clk;
reg sam_clk;
wire lock;
wire [31:0] Inter_Car_line;
wire [31:0] Inter_Car2_line;
//wire signed [52:0] filter_out; //注意看滤波器输出位数，需要匹配
wire signed [51:0] filter_out;
wire signed [31:0] filter_in;
wire [15:0] sign;
assign sign = {16{sim_mea[15]}};
assign filter_in = {sign,sim_mea};
//读取MATLAB的仿真干涉信号与载波信号
initial begin
$readmemb("D:/FPGA_MATLAB_Learning/PGC_FPGA_Realize/Sim/Fir_5M_60K/testdata_1_25M_.txt", adc_mea);
end
initial begin
clk = 0;
rst = 1;
cnt = 0;
sam_clk = 0;
clk_200M = 0;
#1000;
rst = 0;
end
always #10 clk = ~clk ;
always #1.67 clk_300M = ~clk_300M ; //300MHz系统时钟
always #400 sam_clk = ~sam_clk ; //1.25MHz采样时钟
always@(posedge sam_clk or posedge rst)
begin
if(rst) begin
cnt <= 0;
data_come <= 0;
end
else begin
cnt <= cnt + 1;
sim_mea <= adc_mea[cnt];
data_come = ~data_come; //数据准备完成翻转
end
end
always@(posedge clk_300M or posedge rst)
begin
if(rst) begin
data_come1 <= 0;
end
else begin
data_come1 <= data_come;
end
end
always@(posedge clk_300M or posedge rst)
begin
if(rst) begin
data_valid <= 1'b0;
end
else if(data_come1 != data_come) //数据准备完成
data_valid <= 1'b1;
else
data_valid <= 1'b0;
end
Fir_1_25M_20K_30K u1(
.clk(clk_300M),
.clk_enable(1'b1),
.reset(rst),
.data_valid(data_valid),
.filter_in(filter_in),
.filter_out(filter_out),
.finish_flag()
);
endmodule
MATLAB生成待滤波的数据
%% 清空初始化
clc;
clear all;
close all;
%%
% 采样频率1.25MHz
fs= 1.25e6;
% 时间序列
t=0:1/fs:0.1-(1/fs);
% 序列长度
N = length(t);
% 频率刻度
f = (0:N/2)*fs/N;
%signal = 0.2*sin(2*pi*10e3*t)+1.1*sin(2*pi*122e3*t)+0.5*sin(2*pi*100e3*t);
signal = 1.2*sin(2*pi*10e3*t)+1.1*sin(2*pi*50e3*t)+0.5*sin(2*pi*100e3*t);
signal = signal/5;
figure(1);
plot(signal);
title('待量化干涉信号');
%%
%%%%%% 存储ADC数据
%量化位数
nbit = 16;
% 满量程2VPP
full_scale = 2;
%参考电压1V
Vref=1;
%最小辨识电压
LSB = 2/2^16;
% 信号量化(利用二进制补码进行表示)
for i=1:length(signal)
if(signal(i)<0)
signal2(i) = round(signal(i)/LSB);
elseif(signal(i)==0)
signal2(i) = 0;
else
signal2(i) = round(signal(i)/LSB);
end
end
% 转换为二进制数
fid=fopen('D:\FPGA_MATLAB_Learning\PGC_FPGA_Realize\Sim\Fir_5M_60K\testdata_1_25M_.txt','w');
for k=1:length(signal2)
B_s=dec2bin(signal2(k),nbit);
for j=1:nbit
if B_s(j)=='1'
tb=1;
else
tb=0;
end
fprintf(fid,'%d',tb);
end
fprintf(fid,'\r\n');
end
fprintf(fid,';');
fclose(fid);
由MATLAB滤波器设计工具生成的滤波器代码（进行了适当的修改）。值得注意的是需要保证滤波器处理速度与ADC采样频率一致。比如ADC采样频率设置为1.25MHz，那么采样间隔为800ns.这也就是意味着在800ns内Fir滤波器要完成一次滤波操作，并且也只能完成一次滤波操作。因此设置了datavalid用于提示滤波器可以开始处理数据。滤波器的处理时钟为300MHz.滤波器阶数为275阶，那么由于半串行操作需要进行137个时钟周期，而300MHz相对于1.25MHz是其240倍，所以可以在1.25MHz的采样频率间隔内，完成一次FIR滤波操作（卷积运算：乘法与累加）。每当完成一次FIR滤波操作后，应该关闭内部的滤波操作，因此需要增加一个内部用来指示开始滤波的寄存器Start_flag.具体代码如下：
// -------------------------------------------------------------
//
// Module: Fir_1_25M_20K_30K
// Generated by MATLAB(R) 9.13 and Filter Design HDL Coder 3.1.12.
// Generated on: 2024-10-27 13:22:44
// -------------------------------------------------------------
// -------------------------------------------------------------
// HDL Code Generation Options:
//
// TargetDirectory: D:\FPGA_MATLAB_Learning\PGC_FPGA_Realize\Sim\Fir_1_25M_20K_30K
// Name: Fir_1_25M_20K_30K
// SerialPartition: [138 138]
// TargetLanguage: Verilog
// TestBenchStimulus: impulse step ramp chirp noise
// GenerateHDLTestBench: off
// -------------------------------------------------------------
// HDL Implementation : Partly Serial
// Folding Factor : 138
// -------------------------------------------------------------
`timescale 1 ns / 1 ns
module Fir_1_25M_20K_30K
(
clk,
clk_enable,
reset,
filter_in,
data_valid,
filter_out,
finish_flag
);
input clk;
input clk_enable;
input data_valid;
input reset;
input signed [31:0] filter_in; //sfix32
output signed [51:0] filter_out; //sfix52_En19
output finish_flag;
////////////////////////////////////////////////////////////////
//Module Architecture: Fir_1_25M_20K_30K
////////////////////////////////////////////////////////////////
// Local Functions
// Type Definitions
// Constants
parameter signed [15:0] coeff1 = 16'b0000000101101110; //sfix16_En19
parameter signed [15:0] coeff2 = 16'b0000000010010011; //sfix16_En19
parameter signed [15:0] coeff3 = 16'b0000000010101111; //sfix16_En19
parameter signed [15:0] coeff4 = 16'b0000000011001100; //sfix16_En19
parameter signed [15:0] coeff5 = 16'b0000000011101011; //sfix16_En19
parameter signed [15:0] coeff6 = 16'b0000000100001011; //sfix16_En19
parameter signed [15:0] coeff7 = 16'b0000000100101100; //sfix16_En19
parameter signed [15:0] coeff8 = 16'b0000000101001110; //sfix16_En19
parameter signed [15:0] coeff9 = 16'b0000000101101111; //sfix16_En19
parameter signed [15:0] coeff10 = 16'b0000000110010001; //sfix16_En19
parameter signed [15:0] coeff11 = 16'b0000000110110001; //sfix16_En19
parameter signed [15:0] coeff12 = 16'b0000000111010000; //sfix16_En19
parameter signed [15:0] coeff13 = 16'b0000000111101100; //sfix16_En19
parameter signed [15:0] coeff14 = 16'b0000001000000110; //sfix16_En19
parameter signed [15:0] coeff15 = 16'b0000001000011101; //sfix16_En19
parameter signed [15:0] coeff16 = 16'b0000001000101111; //sfix16_En19
parameter signed [15:0] coeff17 = 16'b0000001000111101; //sfix16_En19
parameter signed [15:0] coeff18 = 16'b0000001001000110; //sfix16_En19
parameter signed [15:0] coeff19 = 16'b0000001001001010; //sfix16_En19
parameter signed [15:0] coeff20 = 16'b0000001001000111; //sfix16_En19
parameter signed [15:0] coeff21 = 16'b0000001000111101; //sfix16_En19
parameter signed [15:0] coeff22 = 16'b0000001000101101; //sfix16_En19
parameter signed [15:0] coeff23 = 16'b0000001000010101; //sfix16_En19
parameter signed [15:0] coeff24 = 16'b0000000111110110; //sfix16_En19
parameter signed [15:0] coeff25 = 16'b0000000111001111; //sfix16_En19
parameter signed [15:0] coeff26 = 16'b0000000110100001; //sfix16_En19
parameter signed [15:0] coeff27 = 16'b0000000101101011; //sfix16_En19
parameter signed [15:0] coeff28 = 16'b0000000100101110; //sfix16_En19
parameter signed [15:0] coeff29 = 16'b0000000011101010; //sfix16_En19
parameter signed [15:0] coeff30 = 16'b0000000010100000; //sfix16_En19
parameter signed [15:0] coeff31 = 16'b0000000001010000; //sfix16_En19
parameter signed [15:0] coeff32 = 16'b1111111111111011; //sfix16_En19
parameter signed [15:0] coeff33 = 16'b1111111110100010; //sfix16_En19
parameter signed [15:0] coeff34 = 16'b1111111101000101; //sfix16_En19
parameter signed [15:0] coeff35 = 16'b1111111011100110; //sfix16_En19
parameter signed [15:0] coeff36 = 16'b1111111010000111; //sfix16_En19
parameter signed [15:0] coeff37 = 16'b1111111000100111; //sfix16_En19
parameter signed [15:0] coeff38 = 16'b1111110111001001; //sfix16_En19
parameter signed [15:0] coeff39 = 16'b1111110101101110; //sfix16_En19
parameter signed [15:0] coeff40 = 16'b1111110100011000; //sfix16_En19
parameter signed [15:0] coeff41 = 16'b1111110011000111; //sfix16_En19
parameter signed [15:0] coeff42 = 16'b1111110001111101; //sfix16_En19
parameter signed [15:0] coeff43 = 16'b1111110000111100; //sfix16_En19
parameter signed [15:0] coeff44 = 16'b1111110000000101; //sfix16_En19
parameter signed [15:0] coeff45 = 16'b1111101111011001; //sfix16_En19
parameter signed [15:0] coeff46 = 16'b1111101110111001; //sfix16_En19
parameter signed [15:0] coeff47 = 16'b1111101110100111; //sfix16_En19
parameter signed [15:0] coeff48 = 16'b1111101110100011; //sfix16_En19
parameter signed [15:0] coeff49 = 16'b1111101110101110; //sfix16_En19
parameter signed [15:0] coeff50 = 16'b1111101111001001; //sfix16_En19
parameter signed [15:0] coeff51 = 16'b1111101111110011; //sfix16_En19
parameter signed [15:0] coeff52 = 16'b1111110000101110; //sfix16_En19
parameter signed [15:0] coeff53 = 16'b1111110001111001; //sfix16_En19
parameter signed [15:0] coeff54 = 16'b1111110011010100; //sfix16_En19
parameter signed [15:0] coeff55 = 16'b1111110100111110; //sfix16_En19
parameter signed [15:0] coeff56 = 16'b1111110110110110; //sfix16_En19
parameter signed [15:0] coeff57 = 16'b1111111000111011; //sfix16_En19
parameter signed [15:0] coeff58 = 16'b1111111011001100; //sfix16_En19
parameter signed [15:0] coeff59 = 16'b1111111101101000; //sfix16_En19
parameter signed [15:0] coeff60 = 16'b0000000000001101; //sfix16_En19
parameter signed [15:0] coeff61 = 16'b0000000010110111; //sfix16_En19
parameter signed [15:0] coeff62 = 16'b0000000101100111; //sfix16_En19
parameter signed [15:0] coeff63 = 16'b0000001000011000; //sfix16_En19
parameter signed [15:0] coeff64 = 16'b0000001011001001; //sfix16_En19
parameter signed [15:0] coeff65 = 16'b0000001101110110; //sfix16_En19
parameter signed [15:0] coeff66 = 16'b0000010000011110; //sfix16_En19
parameter signed [15:0] coeff67 = 16'b0000010010111101; //sfix16_En19
parameter signed [15:0] coeff68 = 16'b0000010101010000; //sfix16_En19
parameter signed [15:0] coeff69 = 16'b0000010111010110; //sfix16_En19
parameter signed [15:0] coeff70 = 16'b0000011001001010; //sfix16_En19
parameter signed [15:0] coeff71 = 16'b0000011010101011; //sfix16_En19
parameter signed [15:0] coeff72 = 16'b0000011011110110; //sfix16_En19
parameter signed [15:0] coeff73 = 16'b0000011100101001; //sfix16_En19
parameter signed [15:0] coeff74 = 16'b0000011101000011; //sfix16_En19
parameter signed [15:0] coeff75 = 16'b0000011101000000; //sfix16_En19
parameter signed [15:0] coeff76 = 16'b0000011100100001; //sfix16_En19
parameter signed [15:0] coeff77 = 16'b0000011011100011; //sfix16_En19
parameter signed [15:0] coeff78 = 16'b0000011010000111; //sfix16_En19
parameter signed [15:0] coeff79 = 16'b0000011000001100; //sfix16_En19
parameter signed [15:0] coeff80 = 16'b0000010101110010; //sfix16_En19
parameter signed [15:0] coeff81 = 16'b0000010010111011; //sfix16_En19
parameter signed [15:0] coeff82 = 16'b0000001111100110; //sfix16_En19
parameter signed [15:0] coeff83 = 16'b0000001011110111; //sfix16_En19
parameter signed [15:0] coeff84 = 16'b0000000111101110; //sfix16_En19
parameter signed [15:0] coeff85 = 16'b0000000011001111; //sfix16_En19
parameter signed [15:0] coeff86 = 16'b1111111110011100; //sfix16_En19
parameter signed [15:0] coeff87 = 16'b1111111001011001; //sfix16_En19
parameter signed [15:0] coeff88 = 16'b1111110100001010; //sfix16_En19
parameter signed [15:0] coeff89 = 16'b1111101110110010; //sfix16_En19
parameter signed [15:0] coeff90 = 16'b1111101001010111; //sfix16_En19
parameter signed [15:0] coeff91 = 16'b1111100011111110; //sfix16_En19
parameter signed [15:0] coeff92 = 16'b1111011110101010; //sfix16_En19
parameter signed [15:0] coeff93 = 16'b1111011001100010; //sfix16_En19
parameter signed [15:0] coeff94 = 16'b1111010100101100; //sfix16_En19
parameter signed [15:0] coeff95 = 16'b1111010000001011; //sfix16_En19
parameter signed [15:0] coeff96 = 16'b1111001100000111; //sfix16_En19
parameter signed [15:0] coeff97 = 16'b1111001000100100; //sfix16_En19
parameter signed [15:0] coeff98 = 16'b1111000101100111; //sfix16_En19
parameter signed [15:0] coeff99 = 16'b1111000011010110; //sfix16_En19
parameter signed [15:0] coeff100 = 16'b1111000001110110; //sfix16_En19
parameter signed [15:0] coeff101 = 16'b1111000001001010; //sfix16_En19
parameter signed [15:0] coeff102 = 16'b1111000001010111; //sfix16_En19
parameter signed [15:0] coeff103 = 16'b1111000010100001; //sfix16_En19
parameter signed [15:0] coeff104 = 16'b1111000100101011; //sfix16_En19
parameter signed [15:0] coeff105 = 16'b1111000111110111; //sfix16_En19
parameter signed [15:0] coeff106 = 16'b1111001100000110; //sfix16_En19
parameter signed [15:0] coeff107 = 16'b1111010001011100; //sfix16_En19
parameter signed [15:0] coeff108 = 16'b1111010111110110; //sfix16_En19
parameter signed [15:0] coeff109 = 16'b1111011111010111; //sfix16_En19
parameter signed [15:0] coeff110 = 16'b1111100111111011; //sfix16_En19
parameter signed [15:0] coeff111 = 16'b1111110001100011; //sfix16_En19
parameter signed [15:0] coeff112 = 16'b1111111100001011; //sfix16_En19
parameter signed [15:0] coeff113 = 16'b0000000111110001; //sfix16_En19
parameter signed [15:0] coeff114 = 16'b0000010100010000; //sfix16_En19
parameter signed [15:0] coeff115 = 16'b0000100001100011; //sfix16_En19
parameter signed [15:0] coeff116 = 16'b0000101111100110; //sfix16_En19
parameter signed [15:0] coeff117 = 16'b0000111110010011; //sfix16_En19
parameter signed [15:0] coeff118 = 16'b0001001101100010; //sfix16_En19
parameter signed [15:0] coeff119 = 16'b0001011101001101; //sfix16_En19
parameter signed [15:0] coeff120 = 16'b0001101101001101; //sfix16_En19
parameter signed [15:0] coeff121 = 16'b0001111101011010; //sfix16_En19
parameter signed [15:0] coeff122 = 16'b0010001101101011; //sfix16_En19
parameter signed [15:0] coeff123 = 16'b0010011101111001; //sfix16_En19
parameter signed [15:0] coeff124 = 16'b0010101101111010; //sfix16_En19
parameter signed [15:0] coeff125 = 16'b0010111101100110; //sfix16_En19
parameter signed [15:0] coeff126 = 16'b0011001100110110; //sfix16_En19
parameter signed [15:0] coeff127 = 16'b0011011011100000; //sfix16_En19
parameter signed [15:0] coeff128 = 16'b0011101001011100; //sfix16_En19
parameter signed [15:0] coeff129 = 16'b0011110110100011; //sfix16_En19
parameter signed [15:0] coeff130 = 16'b0100000010101101; //sfix16_En19
parameter signed [15:0] coeff131 = 16'b0100001101110011; //sfix16_En19
parameter signed [15:0] coeff132 = 16'b0100010111101111; //sfix16_En19
parameter signed [15:0] coeff133 = 16'b0100100000011100; //sfix16_En19
parameter signed [15:0] coeff134 = 16'b0100100111110011; //sfix16_En19
parameter signed [15:0] coeff135 = 16'b0100101101110010; //sfix16_En19
parameter signed [15:0] coeff136 = 16'b0100110010010100; //sfix16_En19
parameter signed [15:0] coeff137 = 16'b0100110101010111; //sfix16_En19
parameter signed [15:0] coeff138 = 16'b0100110110111001; //sfix16_En19
parameter signed [15:0] coeff139 = 16'b0100110110111001; //sfix16_En19
parameter signed [15:0] coeff140 = 16'b0100110101010111; //sfix16_En19
parameter signed [15:0] coeff141 = 16'b0100110010010100; //sfix16_En19
parameter signed [15:0] coeff142 = 16'b0100101101110010; //sfix16_En19
parameter signed [15:0] coeff143 = 16'b0100100111110011; //sfix16_En19
parameter signed [15:0] coeff144 = 16'b0100100000011100; //sfix16_En19
parameter signed [15:0] coeff145 = 16'b0100010111101111; //sfix16_En19
parameter signed [15:0] coeff146 = 16'b0100001101110011; //sfix16_En19
parameter signed [15:0] coeff147 = 16'b0100000010101101; //sfix16_En19
parameter signed [15:0] coeff148 = 16'b0011110110100011; //sfix16_En19
parameter signed [15:0] coeff149 = 16'b0011101001011100; //sfix16_En19
parameter signed [15:0] coeff150 = 16'b0011011011100000; //sfix16_En19
parameter signed [15:0] coeff151 = 16'b0011001100110110; //sfix16_En19
parameter signed [15:0] coeff152 = 16'b0010111101100110; //sfix16_En19
parameter signed [15:0] coeff153 = 16'b0010101101111010; //sfix16_En19
parameter signed [15:0] coeff154 = 16'b0010011101111001; //sfix16_En19
parameter signed [15:0] coeff155 = 16'b0010001101101011; //sfix16_En19
parameter signed [15:0] coeff156 = 16'b0001111101011010; //sfix16_En19
parameter signed [15:0] coeff157 = 16'b0001101101001101; //sfix16_En19
parameter signed [15:0] coeff158 = 16'b0001011101001101; //sfix16_En19
parameter signed [15:0] coeff159 = 16'b0001001101100010; //sfix16_En19
parameter signed [15:0] coeff160 = 16'b0000111110010011; //sfix16_En19
parameter signed [15:0] coeff161 = 16'b0000101111100110; //sfix16_En19
parameter signed [15:0] coeff162 = 16'b0000100001100011; //sfix16_En19
parameter signed [15:0] coeff163 = 16'b0000010100010000; //sfix16_En19
parameter signed [15:0] coeff164 = 16'b0000000111110001; //sfix16_En19
parameter signed [15:0] coeff165 = 16'b1111111100001011; //sfix16_En19
parameter signed [15:0] coeff166 = 16'b1111110001100011; //sfix16_En19
parameter signed [15:0] coeff167 = 16'b1111100111111011; //sfix16_En19
parameter signed [15:0] coeff168 = 16'b1111011111010111; //sfix16_En19
parameter signed [15:0] coeff169 = 16'b1111010111110110; //sfix16_En19
parameter signed [15:0] coeff170 = 16'b1111010001011100; //sfix16_En19
parameter signed [15:0] coeff171 = 16'b1111001100000110; //sfix16_En19
parameter signed [15:0] coeff172 = 16'b1111000111110111; //sfix16_En19
parameter signed [15:0] coeff173 = 16'b1111000100101011; //sfix16_En19
parameter signed [15:0] coeff174 = 16'b1111000010100001; //sfix16_En19
parameter signed [15:0] coeff175 = 16'b1111000001010111; //sfix16_En19
parameter signed [15:0] coeff176 = 16'b1111000001001010; //sfix16_En19
parameter signed [15:0] coeff177 = 16'b1111000001110110; //sfix16_En19
parameter signed [15:0] coeff178 = 16'b1111000011010110; //sfix16_En19
parameter signed [15:0] coeff179 = 16'b1111000101100111; //sfix16_En19
parameter signed [15:0] coeff180 = 16'b1111001000100100; //sfix16_En19
parameter signed [15:0] coeff181 = 16'b1111001100000111; //sfix16_En19
parameter signed [15:0] coeff182 = 16'b1111010000001011; //sfix16_En19
parameter signed [15:0] coeff183 = 16'b1111010100101100; //sfix16_En19
parameter signed [15:0] coeff184 = 16'b1111011001100010; //sfix16_En19
parameter signed [15:0] coeff185 = 16'b1111011110101010; //sfix16_En19
parameter signed [15:0] coeff186 = 16'b1111100011111110; //sfix16_En19
parameter signed [15:0] coeff187 = 16'b1111101001010111; //sfix16_En19
parameter signed [15:0] coeff188 = 16'b1111101110110010; //sfix16_En19
parameter signed [15:0] coeff189 = 16'b1111110100001010; //sfix16_En19
parameter signed [15:0] coeff190 = 16'b1111111001011001; //sfix16_En19
parameter signed [15:0] coeff191 = 16'b1111111110011100; //sfix16_En19
parameter signed [15:0] coeff192 = 16'b0000000011001111; //sfix16_En19
parameter signed [15:0] coeff193 = 16'b0000000111101110; //sfix16_En19
parameter signed [15:0] coeff194 = 16'b0000001011110111; //sfix16_En19
parameter signed [15:0] coeff195 = 16'b0000001111100110; //sfix16_En19
parameter signed [15:0] coeff196 = 16'b0000010010111011; //sfix16_En19
parameter signed [15:0] coeff197 = 16'b0000010101110010; //sfix16_En19
parameter signed [15:0] coeff198 = 16'b0000011000001100; //sfix16_En19
parameter signed [15:0] coeff199 = 16'b0000011010000111; //sfix16_En19
parameter signed [15:0] coeff200 = 16'b0000011011100011; //sfix16_En19
parameter signed [15:0] coeff201 = 16'b0000011100100001; //sfix16_En19
parameter signed [15:0] coeff202 = 16'b0000011101000000; //sfix16_En19
parameter signed [15:0] coeff203 = 16'b0000011101000011; //sfix16_En19
parameter signed [15:0] coeff204 = 16'b0000011100101001; //sfix16_En19
parameter signed [15:0] coeff205 = 16'b0000011011110110; //sfix16_En19
parameter signed [15:0] coeff206 = 16'b0000011010101011; //sfix16_En19
parameter signed [15:0] coeff207 = 16'b0000011001001010; //sfix16_En19
parameter signed [15:0] coeff208 = 16'b0000010111010110; //sfix16_En19
parameter signed [15:0] coeff209 = 16'b0000010101010000; //sfix16_En19
parameter signed [15:0] coeff210 = 16'b0000010010111101; //sfix16_En19
parameter signed [15:0] coeff211 = 16'b0000010000011110; //sfix16_En19
parameter signed [15:0] coeff212 = 16'b0000001101110110; //sfix16_En19
parameter signed [15:0] coeff213 = 16'b0000001011001001; //sfix16_En19
parameter signed [15:0] coeff214 = 16'b0000001000011000; //sfix16_En19
parameter signed [15:0] coeff215 = 16'b0000000101100111; //sfix16_En19
parameter signed [15:0] coeff216 = 16'b0000000010110111; //sfix16_En19
parameter signed [15:0] coeff217 = 16'b0000000000001101; //sfix16_En19
parameter signed [15:0] coeff218 = 16'b1111111101101000; //sfix16_En19
parameter signed [15:0] coeff219 = 16'b1111111011001100; //sfix16_En19
parameter signed [15:0] coeff220 = 16'b1111111000111011; //sfix16_En19
parameter signed [15:0] coeff221 = 16'b1111110110110110; //sfix16_En19
parameter signed [15:0] coeff222 = 16'b1111110100111110; //sfix16_En19
parameter signed [15:0] coeff223 = 16'b1111110011010100; //sfix16_En19
parameter signed [15:0] coeff224 = 16'b1111110001111001; //sfix16_En19
parameter signed [15:0] coeff225 = 16'b1111110000101110; //sfix16_En19
parameter signed [15:0] coeff226 = 16'b1111101111110011; //sfix16_En19
parameter signed [15:0] coeff227 = 16'b1111101111001001; //sfix16_En19
parameter signed [15:0] coeff228 = 16'b1111101110101110; //sfix16_En19
parameter signed [15:0] coeff229 = 16'b1111101110100011; //sfix16_En19
parameter signed [15:0] coeff230 = 16'b1111101110100111; //sfix16_En19
parameter signed [15:0] coeff231 = 16'b1111101110111001; //sfix16_En19
parameter signed [15:0] coeff232 = 16'b1111101111011001; //sfix16_En19
parameter signed [15:0] coeff233 = 16'b1111110000000101; //sfix16_En19
parameter signed [15:0] coeff234 = 16'b1111110000111100; //sfix16_En19
parameter signed [15:0] coeff235 = 16'b1111110001111101; //sfix16_En19
parameter signed [15:0] coeff236 = 16'b1111110011000111; //sfix16_En19
parameter signed [15:0] coeff237 = 16'b1111110100011000; //sfix16_En19
parameter signed [15:0] coeff238 = 16'b1111110101101110; //sfix16_En19
parameter signed [15:0] coeff239 = 16'b1111110111001001; //sfix16_En19
parameter signed [15:0] coeff240 = 16'b1111111000100111; //sfix16_En19
parameter signed [15:0] coeff241 = 16'b1111111010000111; //sfix16_En19
parameter signed [15:0] coeff242 = 16'b1111111011100110; //sfix16_En19
parameter signed [15:0] coeff243 = 16'b1111111101000101; //sfix16_En19
parameter signed [15:0] coeff244 = 16'b1111111110100010; //sfix16_En19
parameter signed [15:0] coeff245 = 16'b1111111111111011; //sfix16_En19
parameter signed [15:0] coeff246 = 16'b0000000001010000; //sfix16_En19
parameter signed [15:0] coeff247 = 16'b0000000010100000; //sfix16_En19
parameter signed [15:0] coeff248 = 16'b0000000011101010; //sfix16_En19
parameter signed [15:0] coeff249 = 16'b0000000100101110; //sfix16_En19
parameter signed [15:0] coeff250 = 16'b0000000101101011; //sfix16_En19
parameter signed [15:0] coeff251 = 16'b0000000110100001; //sfix16_En19
parameter signed [15:0] coeff252 = 16'b0000000111001111; //sfix16_En19
parameter signed [15:0] coeff253 = 16'b0000000111110110; //sfix16_En19
parameter signed [15:0] coeff254 = 16'b0000001000010101; //sfix16_En19
parameter signed [15:0] coeff255 = 16'b0000001000101101; //sfix16_En19
parameter signed [15:0] coeff256 = 16'b0000001000111101; //sfix16_En19
parameter signed [15:0] coeff257 = 16'b0000001001000111; //sfix16_En19
parameter signed [15:0] coeff258 = 16'b0000001001001010; //sfix16_En19
parameter signed [15:0] coeff259 = 16'b0000001001000110; //sfix16_En19
parameter signed [15:0] coeff260 = 16'b0000001000111101; //sfix16_En19
parameter signed [15:0] coeff261 = 16'b0000001000101111; //sfix16_En19
parameter signed [15:0] coeff262 = 16'b0000001000011101; //sfix16_En19
parameter signed [15:0] coeff263 = 16'b0000001000000110; //sfix16_En19
parameter signed [15:0] coeff264 = 16'b0000000111101100; //sfix16_En19
parameter signed [15:0] coeff265 = 16'b0000000111010000; //sfix16_En19
parameter signed [15:0] coeff266 = 16'b0000000110110001; //sfix16_En19
parameter signed [15:0] coeff267 = 16'b0000000110010001; //sfix16_En19
parameter signed [15:0] coeff268 = 16'b0000000101101111; //sfix16_En19
parameter signed [15:0] coeff269 = 16'b0000000101001110; //sfix16_En19
parameter signed [15:0] coeff270 = 16'b0000000100101100; //sfix16_En19
parameter signed [15:0] coeff271 = 16'b0000000100001011; //sfix16_En19
parameter signed [15:0] coeff272 = 16'b0000000011101011; //sfix16_En19
parameter signed [15:0] coeff273 = 16'b0000000011001100; //sfix16_En19
parameter signed [15:0] coeff274 = 16'b0000000010101111; //sfix16_En19
parameter signed [15:0] coeff275 = 16'b0000000010010011; //sfix16_En19
parameter signed [15:0] coeff276 = 16'b0000000101101110; //sfix16_En19
// Signals
reg [7:0] cur_count; // ufix8
reg Start_flag;
wire phase_137; // boolean
wire phase_0; // boolean
reg signed [31:0] delay_pipeline [0:275] ; // sfix32
wire signed [31:0] inputmux_1; // sfix32
wire signed [31:0] inputmux_2; // sfix32
reg signed [51:0] acc_final; // sfix52_En19
reg signed [51:0] acc_out_1; // sfix52_En19
wire signed [46:0] product_1; // sfix47_En19
wire signed [15:0] product_1_mux; // sfix16_En19
wire signed [47:0] mul_temp; // sfix48_En19
wire signed [51:0] prod_typeconvert_1; // sfix52_En19
wire signed [51:0] acc_sum_1; // sfix52_En19
wire signed [51:0] acc_in_1; // sfix52_En19
wire signed [51:0] add_signext; // sfix52_En19
wire signed [51:0] add_signext_1; // sfix52_En19
wire signed [52:0] add_temp; // sfix53_En19
reg signed [51:0] acc_out_2; // sfix52_En19
wire signed [46:0] product_2; // sfix47_En19
wire signed [15:0] product_2_mux; // sfix16_En19
wire signed [47:0] mul_temp_1; // sfix48_En19
wire signed [51:0] prod_typeconvert_2; // sfix52_En19
wire signed [51:0] acc_sum_2; // sfix52_En19
wire signed [51:0] acc_in_2; // sfix52_En19
wire signed [51:0] add_signext_2; // sfix52_En19
wire signed [51:0] add_signext_3; // sfix52_En19
wire signed [52:0] add_temp_1; // sfix53_En19
wire signed [51:0] sum1; // sfix52_En19
wire signed [51:0] add_signext_4; // sfix52_En19
wire signed [51:0] add_signext_5; // sfix52_En19
wire signed [52:0] add_temp_2; // sfix53_En19
reg signed [51:0] output_register; // sfix52_En19
//处理标志
always@(posedge clk or posedge reset)
begin
if(reset)
Start_flag <= 1'b0;
else if(data_valid == 1'b1)
Start_flag <= 1'b1;
else if(cur_count >= 8'b10001001)
Start_flag <= 1'b0;
end
// Block Statements
always @ (posedge clk or posedge reset)
begin: Counter_process
if (reset == 1'b1) begin
cur_count <= 8'b10001001;
end
else begin
if (clk_enable == 1'b1) begin
if (cur_count >= 8'b10001001) begin
cur_count <= 8'b00000000;
end
else if(Start_flag == 1'b1) begin
cur_count <= cur_count + 8'b00000001;
end
end
end
end // Counter_process
assign phase_137 = (cur_count == 8'b10001001 && clk_enable == 1'b1) ? 1'b1 : 1'b0;
assign phase_0 = (cur_count == 8'b00000000 && clk_enable == 1'b1 && Start_flag==1'b1) ? 1'b1 : 1'b0;
assign finish_flag = (phase_137 == 1'b1) ? 1'b1 : 1'b0 ;
always @( posedge clk or posedge reset)
begin: Delay_Pipeline_process
if (reset == 1'b1) begin
delay_pipeline[0] <= 0;
delay_pipeline[1] <= 0;
delay_pipeline[2] <= 0;
delay_pipeline[3] <= 0;
delay_pipeline[4] <= 0;
delay_pipeline[5] <= 0;
delay_pipeline[6] <= 0;
delay_pipeline[7] <= 0;
delay_pipeline[8] <= 0;
delay_pipeline[9] <= 0;
delay_pipeline[10] <= 0;
delay_pipeline[11] <= 0;
delay_pipeline[12] <= 0;
delay_pipeline[13] <= 0;
delay_pipeline[14] <= 0;
delay_pipeline[15] <= 0;
delay_pipeline[16] <= 0;
delay_pipeline[17] <= 0;
delay_pipeline[18] <= 0;
delay_pipeline[19] <= 0;
delay_pipeline[20] <= 0;
delay_pipeline[21] <= 0;
delay_pipeline[22] <= 0;
delay_pipeline[23] <= 0;
delay_pipeline[24] <= 0;
delay_pipeline[25] <= 0;
delay_pipeline[26] <= 0;
delay_pipeline[27] <= 0;
delay_pipeline[28] <= 0;
delay_pipeline[29] <= 0;
delay_pipeline[30] <= 0;
delay_pipeline[31] <= 0;
delay_pipeline[32] <= 0;
delay_pipeline[33] <= 0;
delay_pipeline[34] <= 0;
delay_pipeline[35] <= 0;
delay_pipeline[36] <= 0;
delay_pipeline[37] <= 0;
delay_pipeline[38] <= 0;
delay_pipeline[39] <= 0;
delay_pipeline[40] <= 0;
delay_pipeline[41] <= 0;
delay_pipeline[42] <= 0;
delay_pipeline[43] <= 0;
delay_pipeline[44] <= 0;
delay_pipeline[45] <= 0;
delay_pipeline[46] <= 0;
delay_pipeline[47] <= 0;
delay_pipeline[48] <= 0;
delay_pipeline[49] <= 0;
delay_pipeline[50] <= 0;
delay_pipeline[51] <= 0;
delay_pipeline[52] <= 0;
delay_pipeline[53] <= 0;
delay_pipeline[54] <= 0;
delay_pipeline[55] <= 0;
delay_pipeline[56] <= 0;
delay_pipeline[57] <= 0;
delay_pipeline[58] <= 0;
delay_pipeline[59] <= 0;
delay_pipeline[60] <= 0;
delay_pipeline[61] <= 0;
delay_pipeline[62] <= 0;
delay_pipeline[63] <= 0;
delay_pipeline[64] <= 0;
delay_pipeline[65] <= 0;
delay_pipeline[66] <= 0;
delay_pipeline[67] <= 0;
delay_pipeline[68] <= 0;
delay_pipeline[69] <= 0;
delay_pipeline[70] <= 0;
delay_pipeline[71] <= 0;
delay_pipeline[72] <= 0;
delay_pipeline[73] <= 0;
delay_pipeline[74] <= 0;
delay_pipeline[75] <= 0;
delay_pipeline[76] <= 0;
delay_pipeline[77] <= 0;
delay_pipeline[78] <= 0;
delay_pipeline[79] <= 0;
delay_pipeline[80] <= 0;
delay_pipeline[81] <= 0;
delay_pipeline[82] <= 0;
delay_pipeline[83] <= 0;
delay_pipeline[84] <= 0;
delay_pipeline[85] <= 0;
delay_pipeline[86] <= 0;
delay_pipeline[87] <= 0;
delay_pipeline[88] <= 0;
delay_pipeline[89] <= 0;
delay_pipeline[90] <= 0;
delay_pipeline[91] <= 0;
delay_pipeline[92] <= 0;
delay_pipeline[93] <= 0;
delay_pipeline[94] <= 0;
delay_pipeline[95] <= 0;
delay_pipeline[96] <= 0;
delay_pipeline[97] <= 0;
delay_pipeline[98] <= 0;
delay_pipeline[99] <= 0;
delay_pipeline[100] <= 0;
delay_pipeline[101] <= 0;
delay_pipeline[102] <= 0;
delay_pipeline[103] <= 0;
delay_pipeline[104] <= 0;
delay_pipeline[105] <= 0;
delay_pipeline[106] <= 0;
delay_pipeline[107] <= 0;
delay_pipeline[108] <= 0;
delay_pipeline[109] <= 0;
delay_pipeline[110] <= 0;
delay_pipeline[111] <= 0;
delay_pipeline[112] <= 0;
delay_pipeline[113] <= 0;
delay_pipeline[114] <= 0;
delay_pipeline[115] <= 0;
delay_pipeline[116] <= 0;
delay_pipeline[117] <= 0;
delay_pipeline[118] <= 0;
delay_pipeline[119] <= 0;
delay_pipeline[120] <= 0;
delay_pipeline[121] <= 0;
delay_pipeline[122] <= 0;
delay_pipeline[123] <= 0;
delay_pipeline[124] <= 0;
delay_pipeline[125] <= 0;
delay_pipeline[126] <= 0;
delay_pipeline[127] <= 0;
delay_pipeline[128] <= 0;
delay_pipeline[129] <= 0;
delay_pipeline[130] <= 0;
delay_pipeline[131] <= 0;
delay_pipeline[132] <= 0;
delay_pipeline[133] <= 0;
delay_pipeline[134] <= 0;
delay_pipeline[135] <= 0;
delay_pipeline[136] <= 0;
delay_pipeline[137] <= 0;
delay_pipeline[138] <= 0;
delay_pipeline[139] <= 0;
delay_pipeline[140] <= 0;
delay_pipeline[141] <= 0;
delay_pipeline[142] <= 0;
delay_pipeline[143] <= 0;
delay_pipeline[144] <= 0;
delay_pipeline[145] <= 0;
delay_pipeline[146] <= 0;
delay_pipeline[147] <= 0;
delay_pipeline[148] <= 0;
delay_pipeline[149] <= 0;
delay_pipeline[150] <= 0;
delay_pipeline[151] <= 0;
delay_pipeline[152] <= 0;
delay_pipeline[153] <= 0;
delay_pipeline[154] <= 0;
delay_pipeline[155] <= 0;
delay_pipeline[156] <= 0;
delay_pipeline[157] <= 0;
delay_pipeline[158] <= 0;
delay_pipeline[159] <= 0;
delay_pipeline[160] <= 0;
delay_pipeline[161] <= 0;
delay_pipeline[162] <= 0;
delay_pipeline[163] <= 0;
delay_pipeline[164] <= 0;
delay_pipeline[165] <= 0;
delay_pipeline[166] <= 0;
delay_pipeline[167] <= 0;
delay_pipeline[168] <= 0;
delay_pipeline[169] <= 0;
delay_pipeline[170] <= 0;
delay_pipeline[171] <= 0;
delay_pipeline[172] <= 0;
delay_pipeline[173] <= 0;
delay_pipeline[174] <= 0;
delay_pipeline[175] <= 0;
delay_pipeline[176] <= 0;
delay_pipeline[177] <= 0;
delay_pipeline[178] <= 0;
delay_pipeline[179] <= 0;
delay_pipeline[180] <= 0;
delay_pipeline[181] <= 0;
delay_pipeline[182] <= 0;
delay_pipeline[183] <= 0;
delay_pipeline[184] <= 0;
delay_pipeline[185] <= 0;
delay_pipeline[186] <= 0;
delay_pipeline[187] <= 0;
delay_pipeline[188] <= 0;
delay_pipeline[189] <= 0;
delay_pipeline[190] <= 0;
delay_pipeline[191] <= 0;
delay_pipeline[192] <= 0;
delay_pipeline[193] <= 0;
delay_pipeline[194] <= 0;
delay_pipeline[195] <= 0;
delay_pipeline[196] <= 0;
delay_pipeline[197] <= 0;
delay_pipeline[198] <= 0;
delay_pipeline[199] <= 0;
delay_pipeline[200] <= 0;
delay_pipeline[201] <= 0;
delay_pipeline[202] <= 0;
delay_pipeline[203] <= 0;
delay_pipeline[204] <= 0;
delay_pipeline[205] <= 0;
delay_pipeline[206] <= 0;
delay_pipeline[207] <= 0;
delay_pipeline[208] <= 0;
delay_pipeline[209] <= 0;
delay_pipeline[210] <= 0;
delay_pipeline[211] <= 0;
delay_pipeline[212] <= 0;
delay_pipeline[213] <= 0;
delay_pipeline[214] <= 0;
delay_pipeline[215] <= 0;
delay_pipeline[216] <= 0;
delay_pipeline[217] <= 0;
delay_pipeline[218] <= 0;
delay_pipeline[219] <= 0;
delay_pipeline[220] <= 0;
delay_pipeline[221] <= 0;
delay_pipeline[222] <= 0;
delay_pipeline[223] <= 0;
delay_pipeline[224] <= 0;
delay_pipeline[225] <= 0;
delay_pipeline[226] <= 0;
delay_pipeline[227] <= 0;
delay_pipeline[228] <= 0;
delay_pipeline[229] <= 0;
delay_pipeline[230] <= 0;
delay_pipeline[231] <= 0;
delay_pipeline[232] <= 0;
delay_pipeline[233] <= 0;
delay_pipeline[234] <= 0;
delay_pipeline[235] <= 0;
delay_pipeline[236] <= 0;
delay_pipeline[237] <= 0;
delay_pipeline[238] <= 0;
delay_pipeline[239] <= 0;
delay_pipeline[240] <= 0;
delay_pipeline[241] <= 0;
delay_pipeline[242] <= 0;
delay_pipeline[243] <= 0;
delay_pipeline[244] <= 0;
delay_pipeline[245] <= 0;
delay_pipeline[246] <= 0;
delay_pipeline[247] <= 0;
delay_pipeline[248] <= 0;
delay_pipeline[249] <= 0;
delay_pipeline[250] <= 0;
delay_pipeline[251] <= 0;
delay_pipeline[252] <= 0;
delay_pipeline[253] <= 0;
delay_pipeline[254] <= 0;
delay_pipeline[255] <= 0;
delay_pipeline[256] <= 0;
delay_pipeline[257] <= 0;
delay_pipeline[258] <= 0;
delay_pipeline[259] <= 0;
delay_pipeline[260] <= 0;
delay_pipeline[261] <= 0;
delay_pipeline[262] <= 0;
delay_pipeline[263] <= 0;
delay_pipeline[264] <= 0;
delay_pipeline[265] <= 0;
delay_pipeline[266] <= 0;
delay_pipeline[267] <= 0;
delay_pipeline[268] <= 0;
delay_pipeline[269] <= 0;
delay_pipeline[270] <= 0;
delay_pipeline[271] <= 0;
delay_pipeline[272] <= 0;
delay_pipeline[273] <= 0;
delay_pipeline[274] <= 0;
delay_pipeline[275] <= 0;
end
else begin
if (phase_137 == 1'b1) begin
delay_pipeline[0] <= filter_in;
delay_pipeline[1] <= delay_pipeline[0];
delay_pipeline[2] <= delay_pipeline[1];
delay_pipeline[3] <= delay_pipeline[2];
delay_pipeline[4] <= delay_pipeline[3];
delay_pipeline[5] <= delay_pipeline[4];
delay_pipeline[6] <= delay_pipeline[5];
delay_pipeline[7] <= delay_pipeline[6];
delay_pipeline[8] <= delay_pipeline[7];
delay_pipeline[9] <= delay_pipeline[8];
delay_pipeline[10] <= delay_pipeline[9];
delay_pipeline[11] <= delay_pipeline[10];
delay_pipeline[12] <= delay_pipeline[11];
delay_pipeline[13] <= delay_pipeline[12];
delay_pipeline[14] <= delay_pipeline[13];
delay_pipeline[15] <= delay_pipeline[14];
delay_pipeline[16] <= delay_pipeline[15];
delay_pipeline[17] <= delay_pipeline[16];
delay_pipeline[18] <= delay_pipeline[17];
delay_pipeline[19] <= delay_pipeline[18];
delay_pipeline[20] <= delay_pipeline[19];
delay_pipeline[21] <= delay_pipeline[20];
delay_pipeline[22] <= delay_pipeline[21];
delay_pipeline[23] <= delay_pipeline[22];
delay_pipeline[24] <= delay_pipeline[23];
delay_pipeline[25] <= delay_pipeline[24];
delay_pipeline[26] <= delay_pipeline[25];
delay_pipeline[27] <= delay_pipeline[26];
delay_pipeline[28] <= delay_pipeline[27];
delay_pipeline[29] <= delay_pipeline[28];
delay_pipeline[30] <= delay_pipeline[29];
delay_pipeline[31] <= delay_pipeline[30];
delay_pipeline[32] <= delay_pipeline[31];
delay_pipeline[33] <= delay_pipeline[32];
delay_pipeline[34] <= delay_pipeline[33];
delay_pipeline[35] <= delay_pipeline[34];
delay_pipeline[36] <= delay_pipeline[35];
delay_pipeline[37] <= delay_pipeline[36];
delay_pipeline[38] <= delay_pipeline[37];
delay_pipeline[39] <= delay_pipeline[38];
delay_pipeline[40] <= delay_pipeline[39];
delay_pipeline[41] <= delay_pipeline[40];
delay_pipeline[42] <= delay_pipeline[41];
delay_pipeline[43] <= delay_pipeline[42];
delay_pipeline[44] <= delay_pipeline[43];
delay_pipeline[45] <= delay_pipeline[44];
delay_pipeline[46] <= delay_pipeline[45];
delay_pipeline[47] <= delay_pipeline[46];
delay_pipeline[48] <= delay_pipeline[47];
delay_pipeline[49] <= delay_pipeline[48];
delay_pipeline[50] <= delay_pipeline[49];
delay_pipeline[51] <= delay_pipeline[50];
delay_pipeline[52] <= delay_pipeline[51];
delay_pipeline[53] <= delay_pipeline[52];
delay_pipeline[54] <= delay_pipeline[53];
delay_pipeline[55] <= delay_pipeline[54];
delay_pipeline[56] <= delay_pipeline[55];
delay_pipeline[57] <= delay_pipeline[56];
delay_pipeline[58] <= delay_pipeline[57];
delay_pipeline[59] <= delay_pipeline[58];
delay_pipeline[60] <= delay_pipeline[59];
delay_pipeline[61] <= delay_pipeline[60];
delay_pipeline[62] <= delay_pipeline[61];
delay_pipeline[63] <= delay_pipeline[62];
delay_pipeline[64] <= delay_pipeline[63];
delay_pipeline[65] <= delay_pipeline[64];
delay_pipeline[66] <= delay_pipeline[65];
delay_pipeline[67] <= delay_pipeline[66];
delay_pipeline[68] <= delay_pipeline[67];
delay_pipeline[69] <= delay_pipeline[68];
delay_pipeline[70] <= delay_pipeline[69];
delay_pipeline[71] <= delay_pipeline[70];
delay_pipeline[72] <= delay_pipeline[71];
delay_pipeline[73] <= delay_pipeline[72];
delay_pipeline[74] <= delay_pipeline[73];
delay_pipeline[75] <= delay_pipeline[74];
delay_pipeline[76] <= delay_pipeline[75];
delay_pipeline[77] <= delay_pipeline[76];
delay_pipeline[78] <= delay_pipeline[77];
delay_pipeline[79] <= delay_pipeline[78];
delay_pipeline[80] <= delay_pipeline[79];
delay_pipeline[81] <= delay_pipeline[80];
delay_pipeline[82] <= delay_pipeline[81];
delay_pipeline[83] <= delay_pipeline[82];
delay_pipeline[84] <= delay_pipeline[83];
delay_pipeline[85] <= delay_pipeline[84];
delay_pipeline[86] <= delay_pipeline[85];
delay_pipeline[87] <= delay_pipeline[86];
delay_pipeline[88] <= delay_pipeline[87];
delay_pipeline[89] <= delay_pipeline[88];
delay_pipeline[90] <= delay_pipeline[89];
delay_pipeline[91] <= delay_pipeline[90];
delay_pipeline[92] <= delay_pipeline[91];
delay_pipeline[93] <= delay_pipeline[92];
delay_pipeline[94] <= delay_pipeline[93];
delay_pipeline[95] <= delay_pipeline[94];
delay_pipeline[96] <= delay_pipeline[95];
delay_pipeline[97] <= delay_pipeline[96];
delay_pipeline[98] <= delay_pipeline[97];
delay_pipeline[99] <= delay_pipeline[98];
delay_pipeline[100] <= delay_pipeline[99];
delay_pipeline[101] <= delay_pipeline[100];
delay_pipeline[102] <= delay_pipeline[101];
delay_pipeline[103] <= delay_pipeline[102];
delay_pipeline[104] <= delay_pipeline[103];
delay_pipeline[105] <= delay_pipeline[104];
delay_pipeline[106] <= delay_pipeline[105];
delay_pipeline[107] <= delay_pipeline[106];
delay_pipeline[108] <= delay_pipeline[107];
delay_pipeline[109] <= delay_pipeline[108];
delay_pipeline[110] <= delay_pipeline[109];
delay_pipeline[111] <= delay_pipeline[110];
delay_pipeline[112] <= delay_pipeline[111];
delay_pipeline[113] <= delay_pipeline[112];
delay_pipeline[114] <= delay_pipeline[113];
delay_pipeline[115] <= delay_pipeline[114];
delay_pipeline[116] <= delay_pipeline[115];
delay_pipeline[117] <= delay_pipeline[116];
delay_pipeline[118] <= delay_pipeline[117];
delay_pipeline[119] <= delay_pipeline[118];
delay_pipeline[120] <= delay_pipeline[119];
delay_pipeline[121] <= delay_pipeline[120];
delay_pipeline[122] <= delay_pipeline[121];
delay_pipeline[123] <= delay_pipeline[122];
delay_pipeline[124] <= delay_pipeline[123];
delay_pipeline[125] <= delay_pipeline[124];
delay_pipeline[126] <= delay_pipeline[125];
delay_pipeline[127] <= delay_pipeline[126];
delay_pipeline[128] <= delay_pipeline[127];
delay_pipeline[129] <= delay_pipeline[128];
delay_pipeline[130] <= delay_pipeline[129];
delay_pipeline[131] <= delay_pipeline[130];
delay_pipeline[132] <= delay_pipeline[131];
delay_pipeline[133] <= delay_pipeline[132];
delay_pipeline[134] <= delay_pipeline[133];
delay_pipeline[135] <= delay_pipeline[134];
delay_pipeline[136] <= delay_pipeline[135];
delay_pipeline[137] <= delay_pipeline[136];
delay_pipeline[138] <= delay_pipeline[137];
delay_pipeline[139] <= delay_pipeline[138];
delay_pipeline[140] <= delay_pipeline[139];
delay_pipeline[141] <= delay_pipeline[140];
delay_pipeline[142] <= delay_pipeline[141];
delay_pipeline[143] <= delay_pipeline[142];
delay_pipeline[144] <= delay_pipeline[143];
delay_pipeline[145] <= delay_pipeline[144];
delay_pipeline[146] <= delay_pipeline[145];
delay_pipeline[147] <= delay_pipeline[146];
delay_pipeline[148] <= delay_pipeline[147];
delay_pipeline[149] <= delay_pipeline[148];
delay_pipeline[150] <= delay_pipeline[149];
delay_pipeline[151] <= delay_pipeline[150];
delay_pipeline[152] <= delay_pipeline[151];
delay_pipeline[153] <= delay_pipeline[152];
delay_pipeline[154] <= delay_pipeline[153];
delay_pipeline[155] <= delay_pipeline[154];
delay_pipeline[156] <= delay_pipeline[155];
delay_pipeline[157] <= delay_pipeline[156];
delay_pipeline[158] <= delay_pipeline[157];
delay_pipeline[159] <= delay_pipeline[158];
delay_pipeline[160] <= delay_pipeline[159];
delay_pipeline[161] <= delay_pipeline[160];
delay_pipeline[162] <= delay_pipeline[161];
delay_pipeline[163] <= delay_pipeline[162];
delay_pipeline[164] <= delay_pipeline[163];
delay_pipeline[165] <= delay_pipeline[164];
delay_pipeline[166] <= delay_pipeline[165];
delay_pipeline[167] <= delay_pipeline[166];
delay_pipeline[168] <= delay_pipeline[167];
delay_pipeline[169] <= delay_pipeline[168];
delay_pipeline[170] <= delay_pipeline[169];
delay_pipeline[171] <= delay_pipeline[170];
delay_pipeline[172] <= delay_pipeline[171];
delay_pipeline[173] <= delay_pipeline[172];
delay_pipeline[174] <= delay_pipeline[173];
delay_pipeline[175] <= delay_pipeline[174];
delay_pipeline[176] <= delay_pipeline[175];
delay_pipeline[177] <= delay_pipeline[176];
delay_pipeline[178] <= delay_pipeline[177];
delay_pipeline[179] <= delay_pipeline[178];
delay_pipeline[180] <= delay_pipeline[179];
delay_pipeline[181] <= delay_pipeline[180];
delay_pipeline[182] <= delay_pipeline[181];
delay_pipeline[183] <= delay_pipeline[182];
delay_pipeline[184] <= delay_pipeline[183];
delay_pipeline[185] <= delay_pipeline[184];
delay_pipeline[186] <= delay_pipeline[185];
delay_pipeline[187] <= delay_pipeline[186];
delay_pipeline[188] <= delay_pipeline[187];
delay_pipeline[189] <= delay_pipeline[188];
delay_pipeline[190] <= delay_pipeline[189];
delay_pipeline[191] <= delay_pipeline[190];
delay_pipeline[192] <= delay_pipeline[191];
delay_pipeline[193] <= delay_pipeline[192];
delay_pipeline[194] <= delay_pipeline[193];
delay_pipeline[195] <= delay_pipeline[194];
delay_pipeline[196] <= delay_pipeline[195];
delay_pipeline[197] <= delay_pipeline[196];
delay_pipeline[198] <= delay_pipeline[197];
delay_pipeline[199] <= delay_pipeline[198];
delay_pipeline[200] <= delay_pipeline[199];
delay_pipeline[201] <= delay_pipeline[200];
delay_pipeline[202] <= delay_pipeline[201];
delay_pipeline[203] <= delay_pipeline[202];
delay_pipeline[204] <= delay_pipeline[203];
delay_pipeline[205] <= delay_pipeline[204];
delay_pipeline[206] <= delay_pipeline[205];
delay_pipeline[207] <= delay_pipeline[206];
delay_pipeline[208] <= delay_pipeline[207];
delay_pipeline[209] <= delay_pipeline[208];
delay_pipeline[210] <= delay_pipeline[209];
delay_pipeline[211] <= delay_pipeline[210];
delay_pipeline[212] <= delay_pipeline[211];
delay_pipeline[213] <= delay_pipeline[212];
delay_pipeline[214] <= delay_pipeline[213];
delay_pipeline[215] <= delay_pipeline[214];
delay_pipeline[216] <= delay_pipeline[215];
delay_pipeline[217] <= delay_pipeline[216];
delay_pipeline[218] <= delay_pipeline[217];
delay_pipeline[219] <= delay_pipeline[218];
delay_pipeline[220] <= delay_pipeline[219];
delay_pipeline[221] <= delay_pipeline[220];
delay_pipeline[222] <= delay_pipeline[221];
delay_pipeline[223] <= delay_pipeline[222];
delay_pipeline[224] <= delay_pipeline[223];
delay_pipeline[225] <= delay_pipeline[224];
delay_pipeline[226] <= delay_pipeline[225];
delay_pipeline[227] <= delay_pipeline[226];
delay_pipeline[228] <= delay_pipeline[227];
delay_pipeline[229] <= delay_pipeline[228];
delay_pipeline[230] <= delay_pipeline[229];
delay_pipeline[231] <= delay_pipeline[230];
delay_pipeline[232] <= delay_pipeline[231];
delay_pipeline[233] <= delay_pipeline[232];
delay_pipeline[234] <= delay_pipeline[233];
delay_pipeline[235] <= delay_pipeline[234];
delay_pipeline[236] <= delay_pipeline[235];
delay_pipeline[237] <= delay_pipeline[236];
delay_pipeline[238] <= delay_pipeline[237];
delay_pipeline[239] <= delay_pipeline[238];
delay_pipeline[240] <= delay_pipeline[239];
delay_pipeline[241] <= delay_pipeline[240];
delay_pipeline[242] <= delay_pipeline[241];
delay_pipeline[243] <= delay_pipeline[242];
delay_pipeline[244] <= delay_pipeline[243];
delay_pipeline[245] <= delay_pipeline[244];
delay_pipeline[246] <= delay_pipeline[245];
delay_pipeline[247] <= delay_pipeline[246];
delay_pipeline[248] <= delay_pipeline[247];
delay_pipeline[249] <= delay_pipeline[248];
delay_pipeline[250] <= delay_pipeline[249];
delay_pipeline[251] <= delay_pipeline[250];
delay_pipeline[252] <= delay_pipeline[251];
delay_pipeline[253] <= delay_pipeline[252];
delay_pipeline[254] <= delay_pipeline[253];
delay_pipeline[255] <= delay_pipeline[254];
delay_pipeline[256] <= delay_pipeline[255];
delay_pipeline[257] <= delay_pipeline[256];
delay_pipeline[258] <= delay_pipeline[257];
delay_pipeline[259] <= delay_pipeline[258];
delay_pipeline[260] <= delay_pipeline[259];
delay_pipeline[261] <= delay_pipeline[260];
delay_pipeline[262] <= delay_pipeline[261];
delay_pipeline[263] <= delay_pipeline[262];
delay_pipeline[264] <= delay_pipeline[263];
delay_pipeline[265] <= delay_pipeline[264];
delay_pipeline[266] <= delay_pipeline[265];
delay_pipeline[267] <= delay_pipeline[266];
delay_pipeline[268] <= delay_pipeline[267];
delay_pipeline[269] <= delay_pipeline[268];
delay_pipeline[270] <= delay_pipeline[269];
delay_pipeline[271] <= delay_pipeline[270];
delay_pipeline[272] <= delay_pipeline[271];
delay_pipeline[273] <= delay_pipeline[272];
delay_pipeline[274] <= delay_pipeline[273];
delay_pipeline[275] <= delay_pipeline[274];
end
end
end // Delay_Pipeline_process
assign inputmux_1 = (cur_count == 8'b00000000) ? delay_pipeline[0] :
(cur_count == 8'b00000001) ? delay_pipeline[1] :
(cur_count == 8'b00000010) ? delay_pipeline[2] :
(cur_count == 8'b00000011) ? delay_pipeline[3] :
(cur_count == 8'b00000100) ? delay_pipeline[4] :
(cur_count == 8'b00000101) ? delay_pipeline[5] :
(cur_count == 8'b00000110) ? delay_pipeline[6] :
(cur_count == 8'b00000111) ? delay_pipeline[7] :
(cur_count == 8'b00001000) ? delay_pipeline[8] :
(cur_count == 8'b00001001) ? delay_pipeline[9] :
(cur_count == 8'b00001010) ? delay_pipeline[10] :
(cur_count == 8'b00001011) ? delay_pipeline[11] :
(cur_count == 8'b00001100) ? delay_pipeline[12] :
(cur_count == 8'b00001101) ? delay_pipeline[13] :
(cur_count == 8'b00001110) ? delay_pipeline[14] :
(cur_count == 8'b00001111) ? delay_pipeline[15] :
(cur_count == 8'b00010000) ? delay_pipeline[16] :
(cur_count == 8'b00010001) ? delay_pipeline[17] :
(cur_count == 8'b00010010) ? delay_pipeline[18] :
(cur_count == 8'b00010011) ? delay_pipeline[19] :
(cur_count == 8'b00010100) ? delay_pipeline[20] :
(cur_count == 8'b00010101) ? delay_pipeline[21] :
(cur_count == 8'b00010110) ? delay_pipeline[22] :
(cur_count == 8'b00010111) ? delay_pipeline[23] :
(cur_count == 8'b00011000) ? delay_pipeline[24] :
(cur_count == 8'b00011001) ? delay_pipeline[25] :
(cur_count == 8'b00011010) ? delay_pipeline[26] :
(cur_count == 8'b00011011) ? delay_pipeline[27] :
(cur_count == 8'b00011100) ? delay_pipeline[28] :
(cur_count == 8'b00011101) ? delay_pipeline[29] :
(cur_count == 8'b00011110) ? delay_pipeline[30] :
(cur_count == 8'b00011111) ? delay_pipeline[31] :
(cur_count == 8'b00100000) ? delay_pipeline[32] :
(cur_count == 8'b00100001) ? delay_pipeline[33] :
(cur_count == 8'b00100010) ? delay_pipeline[34] :
(cur_count == 8'b00100011) ? delay_pipeline[35] :
(cur_count == 8'b00100100) ? delay_pipeline[36] :
(cur_count == 8'b00100101) ? delay_pipeline[37] :
(cur_count == 8'b00100110) ? delay_pipeline[38] :
(cur_count == 8'b00100111) ? delay_pipeline[39] :
(cur_count == 8'b00101000) ? delay_pipeline[40] :
(cur_count == 8'b00101001) ? delay_pipeline[41] :
(cur_count == 8'b00101010) ? delay_pipeline[42] :
(cur_count == 8'b00101011) ? delay_pipeline[43] :
(cur_count == 8'b00101100) ? delay_pipeline[44] :
(cur_count == 8'b00101101) ? delay_pipeline[45] :
(cur_count == 8'b00101110) ? delay_pipeline[46] :
(cur_count == 8'b00101111) ? delay_pipeline[47] :
(cur_count == 8'b00110000) ? delay_pipeline[48] :
(cur_count == 8'b00110001) ? delay_pipeline[49] :
(cur_count == 8'b00110010) ? delay_pipeline[50] :
(cur_count == 8'b00110011) ? delay_pipeline[51] :
(cur_count == 8'b00110100) ? delay_pipeline[52] :
(cur_count == 8'b00110101) ? delay_pipeline[53] :
(cur_count == 8'b00110110) ? delay_pipeline[54] :
(cur_count == 8'b00110111) ? delay_pipeline[55] :
(cur_count == 8'b00111000) ? delay_pipeline[56] :
(cur_count == 8'b00111001) ? delay_pipeline[57] :
(cur_count == 8'b00111010) ? delay_pipeline[58] :
(cur_count == 8'b00111011) ? delay_pipeline[59] :
(cur_count == 8'b00111100) ? delay_pipeline[60] :
(cur_count == 8'b00111101) ? delay_pipeline[61] :
(cur_count == 8'b00111110) ? delay_pipeline[62] :
(cur_count == 8'b00111111) ? delay_pipeline[63] :
(cur_count == 8'b01000000) ? delay_pipeline[64] :
(cur_count == 8'b01000001) ? delay_pipeline[65] :
(cur_count == 8'b01000010) ? delay_pipeline[66] :
(cur_count == 8'b01000011) ? delay_pipeline[67] :
(cur_count == 8'b01000100) ? delay_pipeline[68] :
(cur_count == 8'b01000101) ? delay_pipeline[69] :
(cur_count == 8'b01000110) ? delay_pipeline[70] :
(cur_count == 8'b01000111) ? delay_pipeline[71] :
(cur_count == 8'b01001000) ? delay_pipeline[72] :
(cur_count == 8'b01001001) ? delay_pipeline[73] :
(cur_count == 8'b01001010) ? delay_pipeline[74] :
(cur_count == 8'b01001011) ? delay_pipeline[75] :
(cur_count == 8'b01001100) ? delay_pipeline[76] :
(cur_count == 8'b01001101) ? delay_pipeline[77] :
(cur_count == 8'b01001110) ? delay_pipeline[78] :
(cur_count == 8'b01001111) ? delay_pipeline[79] :
(cur_count == 8'b01010000) ? delay_pipeline[80] :
(cur_count == 8'b01010001) ? delay_pipeline[81] :
(cur_count == 8'b01010010) ? delay_pipeline[82] :
(cur_count == 8'b01010011) ? delay_pipeline[83] :
(cur_count == 8'b01010100) ? delay_pipeline[84] :
(cur_count == 8'b01010101) ? delay_pipeline[85] :
(cur_count == 8'b01010110) ? delay_pipeline[86] :
(cur_count == 8'b01010111) ? delay_pipeline[87] :
(cur_count == 8'b01011000) ? delay_pipeline[88] :
(cur_count == 8'b01011001) ? delay_pipeline[89] :
(cur_count == 8'b01011010) ? delay_pipeline[90] :
(cur_count == 8'b01011011) ? delay_pipeline[91] :
(cur_count == 8'b01011100) ? delay_pipeline[92] :
(cur_count == 8'b01011101) ? delay_pipeline[93] :
(cur_count == 8'b01011110) ? delay_pipeline[94] :
(cur_count == 8'b01011111) ? delay_pipeline[95] :
(cur_count == 8'b01100000) ? delay_pipeline[96] :
(cur_count == 8'b01100001) ? delay_pipeline[97] :
(cur_count == 8'b01100010) ? delay_pipeline[98] :
(cur_count == 8'b01100011) ? delay_pipeline[99] :
(cur_count == 8'b01100100) ? delay_pipeline[100] :
(cur_count == 8'b01100101) ? delay_pipeline[101] :
(cur_count == 8'b01100110) ? delay_pipeline[102] :
(cur_count == 8'b01100111) ? delay_pipeline[103] :
(cur_count == 8'b01101000) ? delay_pipeline[104] :
(cur_count == 8'b01101001) ? delay_pipeline[105] :
(cur_count == 8'b01101010) ? delay_pipeline[106] :
(cur_count == 8'b01101011) ? delay_pipeline[107] :
(cur_count == 8'b01101100) ? delay_pipeline[108] :
(cur_count == 8'b01101101) ? delay_pipeline[109] :
(cur_count == 8'b01101110) ? delay_pipeline[110] :
(cur_count == 8'b01101111) ? delay_pipeline[111] :
(cur_count == 8'b01110000) ? delay_pipeline[112] :
(cur_count == 8'b01110001) ? delay_pipeline[113] :
(cur_count == 8'b01110010) ? delay_pipeline[114] :
(cur_count == 8'b01110011) ? delay_pipeline[115] :
(cur_count == 8'b01110100) ? delay_pipeline[116] :
(cur_count == 8'b01110101) ? delay_pipeline[117] :
(cur_count == 8'b01110110) ? delay_pipeline[118] :
(cur_count == 8'b01110111) ? delay_pipeline[119] :
(cur_count == 8'b01111000) ? delay_pipeline[120] :
(cur_count == 8'b01111001) ? delay_pipeline[121] :
(cur_count == 8'b01111010) ? delay_pipeline[122] :
(cur_count == 8'b01111011) ? delay_pipeline[123] :
(cur_count == 8'b01111100) ? delay_pipeline[124] :
(cur_count == 8'b01111101) ? delay_pipeline[125] :
(cur_count == 8'b01111110) ? delay_pipeline[126] :
(cur_count == 8'b01111111) ? delay_pipeline[127] :
(cur_count == 8'b10000000) ? delay_pipeline[128] :
(cur_count == 8'b10000001) ? delay_pipeline[129] :
(cur_count == 8'b10000010) ? delay_pipeline[130] :
(cur_count == 8'b10000011) ? delay_pipeline[131] :
(cur_count == 8'b10000100) ? delay_pipeline[132] :
(cur_count == 8'b10000101) ? delay_pipeline[133] :
(cur_count == 8'b10000110) ? delay_pipeline[134] :
(cur_count == 8'b10000111) ? delay_pipeline[135] :
(cur_count == 8'b10001000) ? delay_pipeline[136] :
delay_pipeline[137];
assign inputmux_2 = (cur_count == 8'b00000000) ? delay_pipeline[138] :
(cur_count == 8'b00000001) ? delay_pipeline[139] :
(cur_count == 8'b00000010) ? delay_pipeline[140] :
(cur_count == 8'b00000011) ? delay_pipeline[141] :
(cur_count == 8'b00000100) ? delay_pipeline[142] :
(cur_count == 8'b00000101) ? delay_pipeline[143] :
(cur_count == 8'b00000110) ? delay_pipeline[144] :
(cur_count == 8'b00000111) ? delay_pipeline[145] :
(cur_count == 8'b00001000) ? delay_pipeline[146] :
(cur_count == 8'b00001001) ? delay_pipeline[147] :
(cur_count == 8'b00001010) ? delay_pipeline[148] :
(cur_count == 8'b00001011) ? delay_pipeline[149] :
(cur_count == 8'b00001100) ? delay_pipeline[150] :
(cur_count == 8'b00001101) ? delay_pipeline[151] :
(cur_count == 8'b00001110) ? delay_pipeline[152] :
(cur_count == 8'b00001111) ? delay_pipeline[153] :
(cur_count == 8'b00010000) ? delay_pipeline[154] :
(cur_count == 8'b00010001) ? delay_pipeline[155] :
(cur_count == 8'b00010010) ? delay_pipeline[156] :
(cur_count == 8'b00010011) ? delay_pipeline[157] :
(cur_count == 8'b00010100) ? delay_pipeline[158] :
(cur_count == 8'b00010101) ? delay_pipeline[159] :
(cur_count == 8'b00010110) ? delay_pipeline[160] :
(cur_count == 8'b00010111) ? delay_pipeline[161] :
(cur_count == 8'b00011000) ? delay_pipeline[162] :
(cur_count == 8'b00011001) ? delay_pipeline[163] :
(cur_count == 8'b00011010) ? delay_pipeline[164] :
(cur_count == 8'b00011011) ? delay_pipeline[165] :
(cur_count == 8'b00011100) ? delay_pipeline[166] :
(cur_count == 8'b00011101) ? delay_pipeline[167] :
(cur_count == 8'b00011110) ? delay_pipeline[168] :
(cur_count == 8'b00011111) ? delay_pipeline[169] :
(cur_count == 8'b00100000) ? delay_pipeline[170] :
(cur_count == 8'b00100001) ? delay_pipeline[171] :
(cur_count == 8'b00100010) ? delay_pipeline[172] :
(cur_count == 8'b00100011) ? delay_pipeline[173] :
(cur_count == 8'b00100100) ? delay_pipeline[174] :
(cur_count == 8'b00100101) ? delay_pipeline[175] :
(cur_count == 8'b00100110) ? delay_pipeline[176] :
(cur_count == 8'b00100111) ? delay_pipeline[177] :
(cur_count == 8'b00101000) ? delay_pipeline[178] :
(cur_count == 8'b00101001) ? delay_pipeline[179] :
(cur_count == 8'b00101010) ? delay_pipeline[180] :
(cur_count == 8'b00101011) ? delay_pipeline[181] :
(cur_count == 8'b00101100) ? delay_pipeline[182] :
(cur_count == 8'b00101101) ? delay_pipeline[183] :
(cur_count == 8'b00101110) ? delay_pipeline[184] :
(cur_count == 8'b00101111) ? delay_pipeline[185] :
(cur_count == 8'b00110000) ? delay_pipeline[186] :
(cur_count == 8'b00110001) ? delay_pipeline[187] :
(cur_count == 8'b00110010) ? delay_pipeline[188] :
(cur_count == 8'b00110011) ? delay_pipeline[189] :
(cur_count == 8'b00110100) ? delay_pipeline[190] :
(cur_count == 8'b00110101) ? delay_pipeline[191] :
(cur_count == 8'b00110110) ? delay_pipeline[192] :
(cur_count == 8'b00110111) ? delay_pipeline[193] :
(cur_count == 8'b00111000) ? delay_pipeline[194] :
(cur_count == 8'b00111001) ? delay_pipeline[195] :
(cur_count == 8'b00111010) ? delay_pipeline[196] :
(cur_count == 8'b00111011) ? delay_pipeline[197] :
(cur_count == 8'b00111100) ? delay_pipeline[198] :
(cur_count == 8'b00111101) ? delay_pipeline[199] :
(cur_count == 8'b00111110) ? delay_pipeline[200] :
(cur_count == 8'b00111111) ? delay_pipeline[201] :
(cur_count == 8'b01000000) ? delay_pipeline[202] :
(cur_count == 8'b01000001) ? delay_pipeline[203] :
(cur_count == 8'b01000010) ? delay_pipeline[204] :
(cur_count == 8'b01000011) ? delay_pipeline[205] :
(cur_count == 8'b01000100) ? delay_pipeline[206] :
(cur_count == 8'b01000101) ? delay_pipeline[207] :
(cur_count == 8'b01000110) ? delay_pipeline[208] :
(cur_count == 8'b01000111) ? delay_pipeline[209] :
(cur_count == 8'b01001000) ? delay_pipeline[210] :
(cur_count == 8'b01001001) ? delay_pipeline[211] :
(cur_count == 8'b01001010) ? delay_pipeline[212] :
(cur_count == 8'b01001011) ? delay_pipeline[213] :
(cur_count == 8'b01001100) ? delay_pipeline[214] :
(cur_count == 8'b01001101) ? delay_pipeline[215] :
(cur_count == 8'b01001110) ? delay_pipeline[216] :
(cur_count == 8'b01001111) ? delay_pipeline[217] :
(cur_count == 8'b01010000) ? delay_pipeline[218] :
(cur_count == 8'b01010001) ? delay_pipeline[219] :
(cur_count == 8'b01010010) ? delay_pipeline[220] :
(cur_count == 8'b01010011) ? delay_pipeline[221] :
(cur_count == 8'b01010100) ? delay_pipeline[222] :
(cur_count == 8'b01010101) ? delay_pipeline[223] :
(cur_count == 8'b01010110) ? delay_pipeline[224] :
(cur_count == 8'b01010111) ? delay_pipeline[225] :
(cur_count == 8'b01011000) ? delay_pipeline[226] :
(cur_count == 8'b01011001) ? delay_pipeline[227] :
(cur_count == 8'b01011010) ? delay_pipeline[228] :
(cur_count == 8'b01011011) ? delay_pipeline[229] :
(cur_count == 8'b01011100) ? delay_pipeline[230] :
(cur_count == 8'b01011101) ? delay_pipeline[231] :
(cur_count == 8'b01011110) ? delay_pipeline[232] :
(cur_count == 8'b01011111) ? delay_pipeline[233] :
(cur_count == 8'b01100000) ? delay_pipeline[234] :
(cur_count == 8'b01100001) ? delay_pipeline[235] :
(cur_count == 8'b01100010) ? delay_pipeline[236] :
(cur_count == 8'b01100011) ? delay_pipeline[237] :
(cur_count == 8'b01100100) ? delay_pipeline[238] :
(cur_count == 8'b01100101) ? delay_pipeline[239] :
(cur_count == 8'b01100110) ? delay_pipeline[240] :
(cur_count == 8'b01100111) ? delay_pipeline[241] :
(cur_count == 8'b01101000) ? delay_pipeline[242] :
(cur_count == 8'b01101001) ? delay_pipeline[243] :
(cur_count == 8'b01101010) ? delay_pipeline[244] :
(cur_count == 8'b01101011) ? delay_pipeline[245] :
(cur_count == 8'b01101100) ? delay_pipeline[246] :
(cur_count == 8'b01101101) ? delay_pipeline[247] :
(cur_count == 8'b01101110) ? delay_pipeline[248] :
(cur_count == 8'b01101111) ? delay_pipeline[249] :
(cur_count == 8'b01110000) ? delay_pipeline[250] :
(cur_count == 8'b01110001) ? delay_pipeline[251] :
(cur_count == 8'b01110010) ? delay_pipeline[252] :
(cur_count == 8'b01110011) ? delay_pipeline[253] :
(cur_count == 8'b01110100) ? delay_pipeline[254] :
(cur_count == 8'b01110101) ? delay_pipeline[255] :
(cur_count == 8'b01110110) ? delay_pipeline[256] :
(cur_count == 8'b01110111) ? delay_pipeline[257] :
(cur_count == 8'b01111000) ? delay_pipeline[258] :
(cur_count == 8'b01111001) ? delay_pipeline[259] :
(cur_count == 8'b01111010) ? delay_pipeline[260] :
(cur_count == 8'b01111011) ? delay_pipeline[261] :
(cur_count == 8'b01111100) ? delay_pipeline[262] :
(cur_count == 8'b01111101) ? delay_pipeline[263] :
(cur_count == 8'b01111110) ? delay_pipeline[264] :
(cur_count == 8'b01111111) ? delay_pipeline[265] :
(cur_count == 8'b10000000) ? delay_pipeline[266] :
(cur_count == 8'b10000001) ? delay_pipeline[267] :
(cur_count == 8'b10000010) ? delay_pipeline[268] :
(cur_count == 8'b10000011) ? delay_pipeline[269] :
(cur_count == 8'b10000100) ? delay_pipeline[270] :
(cur_count == 8'b10000101) ? delay_pipeline[271] :
(cur_count == 8'b10000110) ? delay_pipeline[272] :
(cur_count == 8'b10000111) ? delay_pipeline[273] :
(cur_count == 8'b10001000) ? delay_pipeline[274] :
delay_pipeline[275];
// ------------------ Serial partition # 1 ------------------
assign product_1_mux = (cur_count == 8'b00000000) ? coeff1 :
(cur_count == 8'b00000001) ? coeff2 :
(cur_count == 8'b00000010) ? coeff3 :
(cur_count == 8'b00000011) ? coeff4 :
(cur_count == 8'b00000100) ? coeff5 :
(cur_count == 8'b00000101) ? coeff6 :
(cur_count == 8'b00000110) ? coeff7 :
(cur_count == 8'b00000111) ? coeff8 :
(cur_count == 8'b00001000) ? coeff9 :
(cur_count == 8'b00001001) ? coeff10 :
(cur_count == 8'b00001010) ? coeff11 :
(cur_count == 8'b00001011) ? coeff12 :
(cur_count == 8'b00001100) ? coeff13 :
(cur_count == 8'b00001101) ? coeff14 :
(cur_count == 8'b00001110) ? coeff15 :
(cur_count == 8'b00001111) ? coeff16 :
(cur_count == 8'b00010000) ? coeff17 :
(cur_count == 8'b00010001) ? coeff18 :
(cur_count == 8'b00010010) ? coeff19 :
(cur_count == 8'b00010011) ? coeff20 :
(cur_count == 8'b00010100) ? coeff21 :
(cur_count == 8'b00010101) ? coeff22 :
(cur_count == 8'b00010110) ? coeff23 :
(cur_count == 8'b00010111) ? coeff24 :
(cur_count == 8'b00011000) ? coeff25 :
(cur_count == 8'b00011001) ? coeff26 :
(cur_count == 8'b00011010) ? coeff27 :
(cur_count == 8'b00011011) ? coeff28 :
(cur_count == 8'b00011100) ? coeff29 :
(cur_count == 8'b00011101) ? coeff30 :
(cur_count == 8'b00011110) ? coeff31 :
(cur_count == 8'b00011111) ? coeff32 :
(cur_count == 8'b00100000) ? coeff33 :
(cur_count == 8'b00100001) ? coeff34 :
(cur_count == 8'b00100010) ? coeff35 :
(cur_count == 8'b00100011) ? coeff36 :
(cur_count == 8'b00100100) ? coeff37 :
(cur_count == 8'b00100101) ? coeff38 :
(cur_count == 8'b00100110) ? coeff39 :
(cur_count == 8'b00100111) ? coeff40 :
(cur_count == 8'b00101000) ? coeff41 :
(cur_count == 8'b00101001) ? coeff42 :
(cur_count == 8'b00101010) ? coeff43 :
(cur_count == 8'b00101011) ? coeff44 :
(cur_count == 8'b00101100) ? coeff45 :
(cur_count == 8'b00101101) ? coeff46 :
(cur_count == 8'b00101110) ? coeff47 :
(cur_count == 8'b00101111) ? coeff48 :
(cur_count == 8'b00110000) ? coeff49 :
(cur_count == 8'b00110001) ? coeff50 :
(cur_count == 8'b00110010) ? coeff51 :
(cur_count == 8'b00110011) ? coeff52 :
(cur_count == 8'b00110100) ? coeff53 :
(cur_count == 8'b00110101) ? coeff54 :
(cur_count == 8'b00110110) ? coeff55 :
(cur_count == 8'b00110111) ? coeff56 :
(cur_count == 8'b00111000) ? coeff57 :
(cur_count == 8'b00111001) ? coeff58 :
(cur_count == 8'b00111010) ? coeff59 :
(cur_count == 8'b00111011) ? coeff60 :
(cur_count == 8'b00111100) ? coeff61 :
(cur_count == 8'b00111101) ? coeff62 :
(cur_count == 8'b00111110) ? coeff63 :
(cur_count == 8'b00111111) ? coeff64 :
(cur_count == 8'b01000000) ? coeff65 :
(cur_count == 8'b01000001) ? coeff66 :
(cur_count == 8'b01000010) ? coeff67 :
(cur_count == 8'b01000011) ? coeff68 :
(cur_count == 8'b01000100) ? coeff69 :
(cur_count == 8'b01000101) ? coeff70 :
(cur_count == 8'b01000110) ? coeff71 :
(cur_count == 8'b01000111) ? coeff72 :
(cur_count == 8'b01001000) ? coeff73 :
(cur_count == 8'b01001001) ? coeff74 :
(cur_count == 8'b01001010) ? coeff75 :
(cur_count == 8'b01001011) ? coeff76 :
(cur_count == 8'b01001100) ? coeff77 :
(cur_count == 8'b01001101) ? coeff78 :
(cur_count == 8'b01001110) ? coeff79 :
(cur_count == 8'b01001111) ? coeff80 :
(cur_count == 8'b01010000) ? coeff81 :
(cur_count == 8'b01010001) ? coeff82 :
(cur_count == 8'b01010010) ? coeff83 :
(cur_count == 8'b01010011) ? coeff84 :
(cur_count == 8'b01010100) ? coeff85 :
(cur_count == 8'b01010101) ? coeff86 :
(cur_count == 8'b01010110) ? coeff87 :
(cur_count == 8'b01010111) ? coeff88 :
(cur_count == 8'b01011000) ? coeff89 :
(cur_count == 8'b01011001) ? coeff90 :
(cur_count == 8'b01011010) ? coeff91 :
(cur_count == 8'b01011011) ? coeff92 :
(cur_count == 8'b01011100) ? coeff93 :
(cur_count == 8'b01011101) ? coeff94 :
(cur_count == 8'b01011110) ? coeff95 :
(cur_count == 8'b01011111) ? coeff96 :
(cur_count == 8'b01100000) ? coeff97 :
(cur_count == 8'b01100001) ? coeff98 :
(cur_count == 8'b01100010) ? coeff99 :
(cur_count == 8'b01100011) ? coeff100 :
(cur_count == 8'b01100100) ? coeff101 :
(cur_count == 8'b01100101) ? coeff102 :
(cur_count == 8'b01100110) ? coeff103 :
(cur_count == 8'b01100111) ? coeff104 :
(cur_count == 8'b01101000) ? coeff105 :
(cur_count == 8'b01101001) ? coeff106 :
(cur_count == 8'b01101010) ? coeff107 :
(cur_count == 8'b01101011) ? coeff108 :
(cur_count == 8'b01101100) ? coeff109 :
(cur_count == 8'b01101101) ? coeff110 :
(cur_count == 8'b01101110) ? coeff111 :
(cur_count == 8'b01101111) ? coeff112 :
(cur_count == 8'b01110000) ? coeff113 :
(cur_count == 8'b01110001) ? coeff114 :
(cur_count == 8'b01110010) ? coeff115 :
(cur_count == 8'b01110011) ? coeff116 :
(cur_count == 8'b01110100) ? coeff117 :
(cur_count == 8'b01110101) ? coeff118 :
(cur_count == 8'b01110110) ? coeff119 :
(cur_count == 8'b01110111) ? coeff120 :
(cur_count == 8'b01111000) ? coeff121 :
(cur_count == 8'b01111001) ? coeff122 :
(cur_count == 8'b01111010) ? coeff123 :
(cur_count == 8'b01111011) ? coeff124 :
(cur_count == 8'b01111100) ? coeff125 :
(cur_count == 8'b01111101) ? coeff126 :
(cur_count == 8'b01111110) ? coeff127 :
(cur_count == 8'b01111111) ? coeff128 :
(cur_count == 8'b10000000) ? coeff129 :
(cur_count == 8'b10000001) ? coeff130 :
(cur_count == 8'b10000010) ? coeff131 :
(cur_count == 8'b10000011) ? coeff132 :
(cur_count == 8'b10000100) ? coeff133 :
(cur_count == 8'b10000101) ? coeff134 :
(cur_count == 8'b10000110) ? coeff135 :
(cur_count == 8'b10000111) ? coeff136 :
(cur_count == 8'b10001000) ? coeff137 :
coeff138;
assign mul_temp = inputmux_1 * product_1_mux;
assign product_1 = mul_temp[46:0];
assign prod_typeconvert_1 = $signed({{5{product_1[46]}}, product_1});
assign add_signext = prod_typeconvert_1;
assign add_signext_1 = acc_out_1;
assign add_temp = add_signext + add_signext_1;
assign acc_sum_1 = add_temp[51:0];
assign acc_in_1 = (phase_0 == 1'b1) ? prod_typeconvert_1 :
acc_sum_1;
always @ (posedge clk or posedge reset)
begin: Acc_reg_1_process
if (reset == 1'b1) begin
acc_out_1 <= 0;
end
else begin
if (clk_enable == 1'b1 && Start_flag==1'b1) begin
acc_out_1 <= acc_in_1;
end
end
end // Acc_reg_1_process
// ------------------ Serial partition # 2 ------------------
assign product_2_mux = (cur_count == 8'b00000000) ? coeff139 :
(cur_count == 8'b00000001) ? coeff140 :
(cur_count == 8'b00000010) ? coeff141 :
(cur_count == 8'b00000011) ? coeff142 :
(cur_count == 8'b00000100) ? coeff143 :
(cur_count == 8'b00000101) ? coeff144 :
(cur_count == 8'b00000110) ? coeff145 :
(cur_count == 8'b00000111) ? coeff146 :
(cur_count == 8'b00001000) ? coeff147 :
(cur_count == 8'b00001001) ? coeff148 :
(cur_count == 8'b00001010) ? coeff149 :
(cur_count == 8'b00001011) ? coeff150 :
(cur_count == 8'b00001100) ? coeff151 :
(cur_count == 8'b00001101) ? coeff152 :
(cur_count == 8'b00001110) ? coeff153 :
(cur_count == 8'b00001111) ? coeff154 :
(cur_count == 8'b00010000) ? coeff155 :
(cur_count == 8'b00010001) ? coeff156 :
(cur_count == 8'b00010010) ? coeff157 :
(cur_count == 8'b00010011) ? coeff158 :
(cur_count == 8'b00010100) ? coeff159 :
(cur_count == 8'b00010101) ? coeff160 :
(cur_count == 8'b00010110) ? coeff161 :
(cur_count == 8'b00010111) ? coeff162 :
(cur_count == 8'b00011000) ? coeff163 :
(cur_count == 8'b00011001) ? coeff164 :
(cur_count == 8'b00011010) ? coeff165 :
(cur_count == 8'b00011011) ? coeff166 :
(cur_count == 8'b00011100) ? coeff167 :
(cur_count == 8'b00011101) ? coeff168 :
(cur_count == 8'b00011110) ? coeff169 :
(cur_count == 8'b00011111) ? coeff170 :
(cur_count == 8'b00100000) ? coeff171 :
(cur_count == 8'b00100001) ? coeff172 :
(cur_count == 8'b00100010) ? coeff173 :
(cur_count == 8'b00100011) ? coeff174 :
(cur_count == 8'b00100100) ? coeff175 :
(cur_count == 8'b00100101) ? coeff176 :
(cur_count == 8'b00100110) ? coeff177 :
(cur_count == 8'b00100111) ? coeff178 :
(cur_count == 8'b00101000) ? coeff179 :
(cur_count == 8'b00101001) ? coeff180 :
(cur_count == 8'b00101010) ? coeff181 :
(cur_count == 8'b00101011) ? coeff182 :
(cur_count == 8'b00101100) ? coeff183 :
(cur_count == 8'b00101101) ? coeff184 :
(cur_count == 8'b00101110) ? coeff185 :
(cur_count == 8'b00101111) ? coeff186 :
(cur_count == 8'b00110000) ? coeff187 :
(cur_count == 8'b00110001) ? coeff188 :
(cur_count == 8'b00110010) ? coeff189 :
(cur_count == 8'b00110011) ? coeff190 :
(cur_count == 8'b00110100) ? coeff191 :
(cur_count == 8'b00110101) ? coeff192 :
(cur_count == 8'b00110110) ? coeff193 :
(cur_count == 8'b00110111) ? coeff194 :
(cur_count == 8'b00111000) ? coeff195 :
(cur_count == 8'b00111001) ? coeff196 :
(cur_count == 8'b00111010) ? coeff197 :
(cur_count == 8'b00111011) ? coeff198 :
(cur_count == 8'b00111100) ? coeff199 :
(cur_count == 8'b00111101) ? coeff200 :
(cur_count == 8'b00111110) ? coeff201 :
(cur_count == 8'b00111111) ? coeff202 :
(cur_count == 8'b01000000) ? coeff203 :
(cur_count == 8'b01000001) ? coeff204 :
(cur_count == 8'b01000010) ? coeff205 :
(cur_count == 8'b01000011) ? coeff206 :
(cur_count == 8'b01000100) ? coeff207 :
(cur_count == 8'b01000101) ? coeff208 :
(cur_count == 8'b01000110) ? coeff209 :
(cur_count == 8'b01000111) ? coeff210 :
(cur_count == 8'b01001000) ? coeff211 :
(cur_count == 8'b01001001) ? coeff212 :
(cur_count == 8'b01001010) ? coeff213 :
(cur_count == 8'b01001011) ? coeff214 :
(cur_count == 8'b01001100) ? coeff215 :
(cur_count == 8'b01001101) ? coeff216 :
(cur_count == 8'b01001110) ? coeff217 :
(cur_count == 8'b01001111) ? coeff218 :
(cur_count == 8'b01010000) ? coeff219 :
(cur_count == 8'b01010001) ? coeff220 :
(cur_count == 8'b01010010) ? coeff221 :
(cur_count == 8'b01010011) ? coeff222 :
(cur_count == 8'b01010100) ? coeff223 :
(cur_count == 8'b01010101) ? coeff224 :
(cur_count == 8'b01010110) ? coeff225 :
(cur_count == 8'b01010111) ? coeff226 :
(cur_count == 8'b01011000) ? coeff227 :
(cur_count == 8'b01011001) ? coeff228 :
(cur_count == 8'b01011010) ? coeff229 :
(cur_count == 8'b01011011) ? coeff230 :
(cur_count == 8'b01011100) ? coeff231 :
(cur_count == 8'b01011101) ? coeff232 :
(cur_count == 8'b01011110) ? coeff233 :
(cur_count == 8'b01011111) ? coeff234 :
(cur_count == 8'b01100000) ? coeff235 :
(cur_count == 8'b01100001) ? coeff236 :
(cur_count == 8'b01100010) ? coeff237 :
(cur_count == 8'b01100011) ? coeff238 :
(cur_count == 8'b01100100) ? coeff239 :
(cur_count == 8'b01100101) ? coeff240 :
(cur_count == 8'b01100110) ? coeff241 :
(cur_count == 8'b01100111) ? coeff242 :
(cur_count == 8'b01101000) ? coeff243 :
(cur_count == 8'b01101001) ? coeff244 :
(cur_count == 8'b01101010) ? coeff245 :
(cur_count == 8'b01101011) ? coeff246 :
(cur_count == 8'b01101100) ? coeff247 :
(cur_count == 8'b01101101) ? coeff248 :
(cur_count == 8'b01101110) ? coeff249 :
(cur_count == 8'b01101111) ? coeff250 :
(cur_count == 8'b01110000) ? coeff251 :
(cur_count == 8'b01110001) ? coeff252 :
(cur_count == 8'b01110010) ? coeff253 :
(cur_count == 8'b01110011) ? coeff254 :
(cur_count == 8'b01110100) ? coeff255 :
(cur_count == 8'b01110101) ? coeff256 :
(cur_count == 8'b01110110) ? coeff257 :
(cur_count == 8'b01110111) ? coeff258 :
(cur_count == 8'b01111000) ? coeff259 :
(cur_count == 8'b01111001) ? coeff260 :
(cur_count == 8'b01111010) ? coeff261 :
(cur_count == 8'b01111011) ? coeff262 :
(cur_count == 8'b01111100) ? coeff263 :
(cur_count == 8'b01111101) ? coeff264 :
(cur_count == 8'b01111110) ? coeff265 :
(cur_count == 8'b01111111) ? coeff266 :
(cur_count == 8'b10000000) ? coeff267 :
(cur_count == 8'b10000001) ? coeff268 :
(cur_count == 8'b10000010) ? coeff269 :
(cur_count == 8'b10000011) ? coeff270 :
(cur_count == 8'b10000100) ? coeff271 :
(cur_count == 8'b10000101) ? coeff272 :
(cur_count == 8'b10000110) ? coeff273 :
(cur_count == 8'b10000111) ? coeff274 :
(cur_count == 8'b10001000) ? coeff275 :
coeff276;
assign mul_temp_1 = inputmux_2 * product_2_mux;
assign product_2 = mul_temp_1[46:0];
assign prod_typeconvert_2 = $signed({{5{product_2[46]}}, product_2});
assign add_signext_2 = prod_typeconvert_2;
assign add_signext_3 = acc_out_2;
assign add_temp_1 = add_signext_2 + add_signext_3;
assign acc_sum_2 = add_temp_1[51:0];
assign acc_in_2 = (phase_0 == 1'b1) ? prod_typeconvert_2 :
acc_sum_2;
always @ (posedge clk or posedge reset)
begin: Acc_reg_2_process
if (reset == 1'b1) begin
acc_out_2 <= 0;
end
else begin
if (clk_enable == 1'b1 && Start_flag==1'b1) begin
acc_out_2 <= acc_in_2;
end
end
end // Acc_reg_2_process
assign add_signext_4 = acc_out_2;
assign add_signext_5 = acc_out_1;
assign add_temp_2 = add_signext_4 + add_signext_5;
assign sum1 = add_temp_2[51:0];
always @ (posedge clk or posedge reset)
begin: Finalsum_reg_process
if (reset == 1'b1) begin
acc_final <= 0;
end
else begin
if (phase_0 == 1'b1 && Start_flag==1'b1) begin
acc_final <= sum1;
end
end
end // Finalsum_reg_process
always @ (posedge clk or posedge reset)
begin: Output_Register_process
if (reset == 1'b1) begin
output_register <= 0;
end
else begin
if (phase_137 == 1'b1) begin
output_register <= acc_final;
end
end
end // Output_Register_process
// Assignment Statements
assign filter_out = output_register;
endmodule // Fir_1_25M_20K_30K
Modelsim仿真。只要打开Modelsim,新建一个Project，选择work 作为library(没有的话新建)，然后将Testbench文件与滤波器代码添加进去，然后compile all. 待到文件后面全部✔,回到work中右键testbench文件，选择simulate.最终结果如下.
完结，记录一下设计过程，下次遗忘自己方便回顾。
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